Processor performance for computing systems has been improving at a faster rate than memory system performance. The disproportional clock speed between processor and memory makes memory the bottleneck to processor performance. To mitigate the effect of slow memory to processor performance, cache is used to store small data closer to the processor at a comparable speed with the processor. Modern processors implement performance monitoring circuitry in hardware and provide performance counters for software to poll (read). To take the advantage of the locality pattern (local characteristics or behavior) of memory access, the operating system polls hardware performance counters periodically and manages cache accordingly. Polling hardware counters to manage cache has overhead cost in terms of polling time (or the number of cycles used for polling). The polling time may be too small to show a locality or too long averaging out localities. Determining a suitable polling time is difficult due to the dynamic nature of software workload. There is a need for an improved method for monitoring hardware performance in a manner adaptive to the dynamic software workload nature.